上からWestern Digital社のWD2793A, Texas Instrument社のTMS2793, 同じくTMS2797。
上からWestern Digital社のWD2793A, Texas Instrument社のTMS2793, 同じくTMS2797。
WD279xには5つのレジスタがあり、アドレス入力端子と読み書きの条件によって、次のようにアクセスできるレジスタが決まります。
| A1 | A0 | read | write |
| 0 | 0 | Status register | Command register |
| 0 | 1 | Track register | Track register |
| 1 | 0 | Sector register | Sector register |
| 1 | 1 | Data register | Data register |
WD2791とWD2793のコマンド表。7 - 0はビット番号で7がMSB。
| Type | Command | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| I | Restore | 0 | 0 | 0 | 0 | h | V | r1 | r0 |
| I | Seek | 0 | 0 | 0 | 1 | h | V | r1 | r0 |
| I | Step | 0 | 0 | 1 | T | h | V | r1 | r0 |
| I | Step-in | 0 | 1 | 0 | T | h | V | r1 | r0 |
| I | Step-out | 0 | 1 | 1 | T | h | V | r1 | r0 |
| II | Read Sector | 1 | 0 | 0 | m | S | E | C | 0 |
| II | Write Sector | 1 | 0 | 1 | m | S | E | C | a0 |
| III | Read Address | 1 | 1 | 0 | 0 | 0 | E | 0 | 0 |
| III | Read Track | 1 | 1 | 1 | 0 | 0 | E | 0 | 0 |
| III | Write Track | 1 | 1 | 1 | 1 | 0 | E | 0 | 0 |
| IV | Force Interrupt | 1 | 1 | 0 | 1 | I3 | I2 | I1 | I0 |
WD2795とWD2797のコマンド表。
| Type | Command | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| I | Restore | 0 | 0 | 0 | 0 | h | V | r1 | r0 |
| I | Seek | 0 | 0 | 0 | 1 | h | V | r1 | r0 |
| I | Step | 0 | 0 | 1 | T | h | V | r1 | r0 |
| I | Step-in | 0 | 1 | 0 | T | h | V | r1 | r0 |
| I | Step-out | 0 | 1 | 1 | T | h | V | r1 | r0 |
| II | Read Sector | 1 | 0 | 0 | m | L | E | U | 0 |
| II | Write Sector | 1 | 0 | 1 | m | L | E | U | a0 |
| III | Read Address | 1 | 1 | 0 | 0 | 0 | E | U | 0 |
| III | Read Track | 1 | 1 | 1 | 0 | 0 | E | U | 0 |
| III | Write Track | 1 | 1 | 1 | 1 | 0 | E | U | 0 |
| IV | Force Interrupt | 1 | 1 | 0 | 1 | I3 | I2 | I1 | I0 |
コマンド表の中で使用していたオプションフラグの意味をまとめてみました。
| Type | bit | mne. | description |
| I | 0, 1 | r1, r0: stepping motor rate | 別表参照 |
| I | 2 | V: track number verify flag | V = 0: No verify
V = 1: Verify on destination track |
| I | 3 | h: head load flag | h = 0: Unload head at beginning
h = 1: Load head at beginning |
| I | 4 | T: track update flag | T = 0: No update
T = 1: Update track register |
| II | 0 | a0: data address mark | a0 = 0: FB (data address mark)
a0 = 1: F8 (deleted data address mark) |
| II | 1 | C: side compare flag | C = 0: Disable side compare
C = 1: Enable side compare |
| II & III | 1 | U: update side select out | U = 0: Update SSO to 0
U = 1: Update SSO to 1 |
| II & III | 2 | E: 15 ms delay | E = 0: No 15 ms delay
E = 1: 15 ms delay (30 ms for 1 MHz clock) |
| II | 3 | S: side compare | S = 0: Compare for side 0
S = 1: Compare for side 1 |
| II | 3 | L: sector length flag | 別表参照 |
| II | 4 | m: multiple record flag | m = 0: single record
m = 1: multiple record |
| IV | 0 - 3 | Ix: interrupt condition flags | I0 = 1: Not Ready to Ready transition
I1 = 1: Ready to Not Ready transition I2 = 1: Index pulse I3 = 1: Immediate Interrupt, Requires a reset I3 - I0 = 0: Terminate with No Interrupt |
上の表にある別表参照分の表について、まずステッピングモータのステップレート表。
| r1 | r0 | CLK = 2 MHz | CLK = 1 MHz |
| 0 | 0 | 3 ms | 6 ms |
| 0 | 1 | 6 ms | 12 ms |
| 1 | 0 | 10 ms | 20 ms |
| 1 | 1 | 15 ms | 30 ms |
次にセクタ長の表。
| LSBs of Sector Length in ID Field | 00 | 01 | 10 | 11 |
| L = 0 | 256 | 512 | 1024 | 128 |
| L = 1 | 128 | 256 | 512 | 1024 |
コマンド実行にしたがってステータスレジスタがどのような意味になるか、次の表にまとめました。
| command | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| all type I commands | Not Ready | Write Protect | Head Loaded | Seek Error | CRC Error | Track 0 | Index Pulse | Busy |
| Read Address | Not Ready | 0 | 0 | Record Not Found | CRC Error | Lost Data | DRQ | Busy |
| Read Sector | Not Ready | 0 | Record Type | Record Not Found | CRC Error | Lost Data | DRQ | Busy |
| Read Track | Not Ready | 0 | 0 | 0 | 0 | Lost Data | DRQ | Busy |
| Write Sector | Not Ready | Write Protect | 0 | Record Not Found | CRC Error | Lost Data | DRQ | Busy |
| Write Track | Not Ready | Write Protect | 0 | 0 | 0 | Lost Data | DRQ | Busy |
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